RECENT SAMPLE PROJECTS:

Project: Pill Dispenser

The product is an advanced home medical device designed to monitor dispensing of medication to elderly clients. The device transmits camera images of the pillbox over ethernet or a POTS line and uses Voice-over-Internet-Protocol (VOIP) to communicate with caregivers or a call center. Enhanced bootloader to add diagnostic tests to support manufacturing and verify proper operation in the field. Enhanced stepper motor drivers for direct control using a scripting language.

Project: Pro Audio SACD player

The product is a high end SACD audio disc player. Developed code in C using IAR Embedded Workbench tools for STR750 ARM7 microcontroller. Created bootloader, in-system updates for all firmware including Microchip PIC18, Xilinx FPGA and CPLD. Hardware system bring up. Integrated with clients Visual SourceSafe version control system. Integrated Crestron remote control.

Other Experience:

Setup new development environment and ported C/C++ code from Enea OSE RTOS using Green Hills compiler with Multi IDE to CENTOS (Red Hat Enterprise Linux) environment using Eclipse IDE, GCC, GDB. This multi-threaded application ran on a dual dual-core Xeon server. Developed compatibility libraries to run some code originally written for Windows under Linux.

Created licensing manager for a telecom product in C for OSE operating system to enable call limits, trial licenses, leased licenses, backup licenses, and application restrictions. Developed license key generation program for Windows using Microsoft Visual C++.NET

Developed an integrated IEEE 1149.1 JTAG architecture allowing boundary scan test, CPU and DSP debuggers, in-system reprogramming of CPLDs and FPGA, and Ethernet downloadable updates to firmware and programmable devices. Developed and maintained ASSET boundary scan test. Wrote emulator initialization and test scripts for system bring-up.

Created the Power-On-Self-Test (POST) and diagnostics using Visionware and all device initialization for the product. Developed test procedure for HALT, ESS, NEBS GR-63 and GR-1089 level 3, FCC Part 15 A. Experience programming and debugging DS-3 ISDN/CAS telco interface, 1000BASE-TX gigabit Ethernet, 1000BASE-SX gigabit fiber Ethernet, PowerPC, Marvell Discovery, TI DSPs, PCI bridging, managed Ethernet switch, Rabbit 3200 maintenance processor using Dynamic C, RS-485, I2C, SNMP, Wind River VisionClick/Visionprobe debugger, 1+1 failover, thermal-based fan speed control.

Developed Board Support Package (BSP) in assembly and C for VxWorks RTOS to control 100Base-FX/Gigabit Ethernet Fiber Optic Access Switch. Used EST emulator to bring up/integrate board based on Hitachi SH-4 DSP RISC Processor. Integrated SDRAM, Flash memory, Altera ACEX FPGA, Mitel (Vertex Networks) Ethernet switch, Altima PHYs.

CPU: ARM Cortex-A5, Analog Devices Blackfin, PowerPC, ARM7, Microchip Pic, Rabbit, Hitachi SH-4

OS: FreeRTOS, U-Boot, uClinux, Windows, Linux, VxWorks

Source Control: Git, Subversion(SVN), CVS, SourceSafe, Clearcase

Power-On-Self-Test(POST), Diagnostics, Boundary scan testing, in-system programming